Kontron COMe-cPC2 User Manual Page 81
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COMe-cPC2 / BIOS Operation
PCIExpress Configuration
Feature Option Description
Relaxed Ordering
Auto
Disables
Enabled
Enables/Disables PCI Express Device Relaxed Ordering.
Maximum Payload Size
Auto
128 Bytes
…
4096 Bytes
Set Maximum Payload of PCI Express Device or allow
System BIOS to select the value.
Extended Tag Field
Auto
Disables
Enabled
If Enabled, allows Device to use 8-bit TAG field as a
requester.
No Snoop
Auto
Disables
Enabled
Enables/Disables PCI Express Device No Snoop option.
Maximum Read Request Size
Auto
128 Bytes
…
4096 Bytes
Set Maximum Read Request Size of PCI Express Device or
allow System BIOS to select the value.
Active State Power Management
Disabled
Enabled
Enables/Disables PCI Express L0 and L1 link power
states.
Extended Synch
Auto
Disables
Enabled
If Enabled, allows generation of Extended
Synchronisation patterns.
PCIE Port N
Auto
Enabled
Disabled
Enables/Disables or autoconfigures the PCIE Port N
PCIE High Priority Port
Disabled
Port 0
Port 1
Port 2
…
Port 5
Select the PCIE Port that gets higher priority than the
others.
PCIE Port N IOxAPIC Enable
Disabled
Enabled
Enables/Disables the APIC Support for the PCIE Port N
81
- COMe-cPC2 1
- » Table of Contents « 3
- 1 User Information 6
- 1.5 Warranty 7
- 1.6 Technical Support 7
- 1.7 Naming clarification 7
- COMe-cPC2 / User Information 8
- 1.10 COM Express® Benefits 9
- 2 Product Specification 10
- 2.2 Functional Specification 11
- Graphics Core 12
- Connectivity 13
- Misc Interfaces and Features 13
- Kontron Features 13
- Power Features 13
- Supported Operating Systems 14
- 2.3 Block Diagram 15
- 2.4 Electrical Specification 16
- 2.4.5 ATX Mode 17
- 2.4.6 Single Supply Mode 17
- 2.5 Power Control 18
- 2.6.2 Humidity 19
- CE marking 20
- WEEE Directive 20
- Conformal Coating 20
- Shock & Vibration 21
- 2.8 MTBF 22
- 2.9 Mechanical Specification 23
- 2.10 Module Dimensions 23
- 2.11 Thermal Management 24
- 2.12 Heatspreader 24
- 2.13 Onboard Fan Connector 25
- 3 Features and Interfaces 27
- 3.3 LPC boot 29
- 3.4 M.A.R.S 30
- 3.5 Fast I2C 31
- 3.6 JIDA16 and JIDA32 32
- 3.7 K-Station 1 33
- 3.8.1 I2C 34
- 3.8.2 Storage 34
- 3.8.3 GPIO 34
- 3.8.4 Hardware Monitor 34
- Configuration 35
- 3.10 Watchdog Timer 36
- 3.11 Flash Backup Feature 37
- 3.12 Speedstep Technology 39
- 3.13 C-States 40
- 3.15 VID-x 42
- 3.20 Display Configurations 46
- DDI Design Consideration 47
- Requirements 48
- Setup a Multi-monitor system 48
- 3.22 Intel® vPro™ technology 50
- 4 System Resources 52
- 4.3 Memory Area 53
- COMe-cPC2 / System Resources 54
- 5 Connectors 55
- 5.2 Pinout List 56
- 5.2.2 Connector X1A Row A 57
- COMe-cPC2 / Connectors 58
- 5.2.3 Connector X1A Row B 59
- 5.2.4 Connector X1B Row C 61
- 5.2.5 Connector X1B Row D 63
- 6 BIOS Operation 65
- 6.3 Setup Guide 66
- 6.4 BIOS Setup 68
- 6.4.2 Module Info 69
- Module Software Revisions 70
- Current LVDS Configuration 70
- Memory Module Information 71
- 6.4.3 Advanced Menu 72
- CPU Configuration 73
- IDE Configuration 74
- IDE Device Submenu 74
- AHCI Configuration 75
- AHCI PortN Submenu 75
- SuperIO Configuration 76
- Floppy Configuration Submenu 77
- ACPI Configuration 78
- ACPI Cooling Options 79
- PCIExpress Configuration 81
- USB Configuration 82
- COMe-cPC2 / BIOS Operation 83
- Hardware Health 84
- Baseboard Hardware Health 85
- Miscellaneous Settings 86
- Event Log Configuration 87
- MARS Interface Configuration 88
- Watchdog 89
- I2C Busses 90
- Remote Access Configuration 91
- Ethernet Configuration 92
- Features 93
- ME Subsystem Configuration 94
- Intel VT-d Configuration 95
- Trusted Computing 96
- 6.4.4 PCIPnP Menu 97
- 6.4.5 Boot 98
- 6.4.6 Security 99
- 6.4.7 Chipset 100
- North Bridge Configuration 101
- Display Control 102
- Internal LVDS Configuration 103
- Southbridge Configuration 104
- LPC Decode Range 105
- 6.4.8 Exit Menu 106
- Corporate Offices 107
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